The present invention relates to analog to digital converters and, more specifically, to those for use with high speed analog signals, such as video television signals and the like.
Known methods of converting television video and other high frequency analog signals into corresponding digital signals usually use analog sample and hold circuits. These systems periodically sample the amplitude of the incoming analog signal and then hold the sample. During the hold period, which is the time between sampling strobe pulses, the amplitude of the analog sample is converted into a corresponding digital number. After the conversion is completed, another analog sample is taken and the hold and conversion sequence is repeated. The actual analog to digital converter, the circuit receiving the output of the sample and hold circuit, can be any one of a number of different types of voltage to digital number converters but must be capable of completing the conversion during the hold period.
While this method of high speed analog to digital conversion is in general use, the analog sample and hold circuit is generally expensive and typically represents at least 25% of the cost of presently available video speed analog to digital converters. Also, high speed sample and hold circuits are difficult to mass produce using monolithic integrated circuit techniques. Accordingly, hybrid circuit techniques are usually employed which require hand adjustment of critical circuit parameters. Also, sample and hold circuits often introduce errors into the digital conversion process since, when commanded to sample, they require a finite amount of time to complete the sample and hold process. The sample that is finally acquired is not necessarily an instantaneous value of the input, but rather, may represent an average of the input signal over the acquisition time. The limitations in these sample and hold circuits place absolute limits on the speed and cost of practical video speed analog to digital converters presently available.